cystech electronics corp. spec. no. : c 131v8 issued date : 20 15 . 06 . 02 revised date : 2015.06. 2 5 page no. : 1 / 9 MTA7D0N01V8 cyste k product specification n - channel logic level enhancement mode power mosfet MTA7D0N01V8 features ? single drive requirement ? low on - resistance ? fast switching characteristic ? pb - free lead plating and halogen - free package e quivalent circuit outline ordering information device package shipping m t a7d0n01v8 - 0 - t6 - g dfn3 3 (pb - free lead plating and halogen - free package) 3000 pcs / tape & reel dfn3 3 MTA7D0N01V8 g gate d drain s source p in 1 bv dss 16v i d @ t c =25 c, v gs =10v 2 8a i d @ t a =25 c, v gs =10v 12.5a r dson(typ) v gs =10v, i d =11a 6.4m v gs =4.5v, i d =8a 7.5m v gs =3v, i d =5a 9.0m environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t 6 : 3000 pcs / tape & reel, 13 reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c 131v8 issued date : 20 15 . 06 . 02 revised date : 2015.06. 2 5 page no. : 2 / 9 MTA7D0N01V8 cyste k product specification absolute maximum rati ngs (ta=25 ? c , unless otherwise specified ) parameter symbol limits unit drain - sour c e voltage v ds 16 v gate - source voltage v gs 10 continuous drain current @ v gs =10v, t c =25 ? c i d 28 a continuous drain current @ v gs =10v, t c =100 ? c 17.7 continuous drain current @ v gs =10v, t a =25 ? c i dsm 12.5 continuous drain current @ v gs =10v, t a =70 ? c 10 pulsed drain current i dm 112 *1 avalanche current i as 21 avalanche energy @ l=0.1mh, i d =21a, r g =25 e as 22 mj total power dissipation t c =25 p d 12.5 w t c =100 5 t a =25 p dsm 2.5 *2 t a =70 1.6 *2 operating junction and storage temperature range tj, tstg - 55~+1 50 ? c thermal data parameter symbol va lue unit thermal resistance, junction - to - case, max r th,j - c 10 ? c /w thermal resistance, junction - to - ambient, max r th,j - a 50 *2 ? c /w note : 1. pulse width limited by maximum junction temperature. 2. surface mounted on a 1 in 2 pad of 2oz copper, t 10s. in practice r th,j - a will be determined by customer s pcb characteristics. 125 c/w when mounted on a minimum pad of 2 oz. copper. characteristics (t c =25 ? symbol min. typ. max. unit test conditions stati c bv dss 16 - - v v gs = 0v , i d = 250 a v gs(th) 0. 5 0 .75 1. 0 v ds = v gs , i d = 250 a g fs *1 - 18 - s v ds = 5v , i d = 11a i gss - - 100 n a v gs = 8v i dss - - 1 a v ds = 16v, v gs =0v - - 5 v ds = 16v, v gs =0v, tj=55 ? c r ds ( on ) *1 - 6.4 8.5 m v gs = 10v , i d = 11a - 7.5 9.8 v gs = 4.5v , i d = 8a - 9 12 v gs = 3v , i d = 5a dynamic ciss - 853 - pf v ds =10v, v gs =0v, f=1mhz co ss - 209 - crss - 171 - qg *1, 2 8 .5 11.6 1 5 nc v ds =15v, v gs =4.5v, i d =20a qgs *1, 2 - 1.6 - qgd *1, 2 - 5.2 -
cystech electronics corp. spec. no. : c 131v8 issued date : 20 15 . 06 . 02 revised date : 2015.06. 2 5 page no. : 3 / 9 MTA7D0N01V8 cyste k product specification characteristics (t c =25 ? symbol min. typ. max. unit test conditions t d(on) *1, 2 - 9.4 14.1 ns v ds =12.5v, i d =20a, v gs =4.5v, r gs =2 tr *1, 2 - 22.4 33.6 t d(off) *1, 2 - 36.6 54.9 t f *1, 2 - 18.4 27.6 t d(on) *1, 2 - 5.4 8.1 ns v ds =15v, i d =20a, v gs =10v, r gs =3 tr *1, 2 - 14.4 21.6 t d(off) *1, 2 - 39.2 58.8 t f *1, 2 - 9.4 14.1 rg 2 .5 3.7 5 f=1mhz source - drain diode i s *1 - - 28 a v sd *1 - 0.9 1.2 v i s =16a, v gs =0v trr - 12.8 - ns i f =20a, di f /dt=100a/ s qrr - 5.8 - nc note : * 1. pulse test : pulse width ? 3 0 0s, duty cycle ? 2% *2.independent of operating temperature recommended soldering footprint unit : mm
cystech electronics corp. spec. no. : c 131v8 issued date : 20 15 . 06 . 02 revised date : 2015.06. 2 5 page no. : 4 / 9 MTA7D0N01V8 cyste k product specification typical characteristics typical output characteristics 0 10 20 30 40 50 60 70 80 90 0 2 4 6 8 10 v ds , drain-source voltage(v) i d , drain current(a) 3v 2.5v 3.5v v gs =2v 10v , 9v,8v,7v,6v,5v,4v brekdown voltage vs ambient temperature 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 1 10 100 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =10v v gs =3v v gs =4.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 0 2 4 6 8 10 12 14 16 18 20 i dr , reverse drain current(a) v sd , source-drain voltage(v) tj=25c tj=150c static drain-source on-state resistance vs gate-source voltage 0 10 20 30 40 50 60 70 80 90 100 0 2 4 6 8 10 v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =11a drain-source on-state resistance vs junction tempearture 0 0.4 0.8 1.2 1.6 2 2.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =10v, i d =11a r dson @tj=25c : 7.5m typ. v gs =4.5v, i d =8a r dson @tj=25c : 6.4m typ.
cystech electronics corp. spec. no. : c 131v8 issued date : 20 15 . 06 . 02 revised date : 2015.06. 2 5 page no. : 5 / 9 MTA7D0N01V8 cyste k product specification typical characteristic s(cont.) capacitance vs drain-to-source voltage 100 1000 10000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a i d =1ma forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 i d , drain current(a) g fs , forward transfer admittance(s) v ds =5v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 0 4 8 12 16 20 24 qg, total gate charge(nc) v gs , gate-source voltage(v) i d =20a v ds =15v v ds =12.5v maximum safe operating area 0.1 1 10 100 1000 0.01 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current(a) dc 10ms 100ms 1ms 100 s 1 s r ds(on) limit t a =25c, tj=150c, v gs =10v r ja =50c/w, single pulse maximum drain current vs junction temperature 0 2 4 6 8 10 12 14 25 50 75 100 125 150 175 tj , junctione temperature(c) i d , maxim um drain current(a) t a =25c, v gs =10v, r ja =50c/w single pulse
cystech electronics corp. spec. no. : c 131v8 issued date : 20 15 . 06 . 02 revised date : 2015.06. 2 5 page no. : 6 / 9 MTA7D0N01V8 cyste k product specification typical characterist ic s(cont.) typical transfer characteristics 0 10 20 30 40 50 60 70 80 90 0 1 2 3 4 5 v gs , gate-source voltage(v) i d , drain current (a) v ds =5v single pulse power rating, junction to ambient (note on page 2) 0 50 100 150 200 250 300 0.0001 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j(max) =150c t a =25c r ja =50c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized effectivetransient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *r ja (t) 4.r ja =50 c/w
cystech electronics corp. spec. no. : c 131v8 issued date : 20 15 . 06 . 02 revised date : 2015.06. 2 5 page no. : 7 / 9 MTA7D0N01V8 cyste k product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c 131v8 issued date : 20 15 . 06 . 02 revised date : 2015.06. 2 5 page no. : 8 / 9 MTA7D0N01V8 cyste k product specification recommended wave soldering condition product peak temperature soldering time pb - free devices 260 +0/ - 5 ? c 5 +1/ - 1 seconds recommended temperature profile for ir reflow profile feature sn - pb eutectic assembly pb - free assembly average ramp - up rate (tsmax to tp) 3 ? c /second max. 3 ? c /second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 ? c 150 ? c 60 - 120 seconds 150 ? c 200 ? c 60 - 180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 ? c 60 - 150 seconds 217 ? c 60 - 150 seconds peak temperature(t p ) 240 +0/ - 5 ? c 260 +0/ - 5 ? c time within 5 ? c of actual peak temperature(tp) 10 - 30 seconds 20 - 40 seconds ramp down rate 6 ? c /second max. 6 ? c /second max. time 25 ? c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of th e package, measured on the package body surface.
cystech electronics corp. spec. no. : c 131v8 issued date : 20 15 . 06 . 02 revised date : 2015.06. 2 5 page no. : 9 / 9 MTA7D0N01V8 cyste k product specification dfn3 *: typical dim inches millimeters dim inches millimeters min. max. min. max. min. max. min. max. a 0. 0276 0. 0354 0.70 0.9 0 e 0.1181 0.1260 3.00 3.20 a1 0. 0000 0. 0197 0.00 0.50 e 1 0.0531 0.0610 1.35 1.55 b 0. 0094 0. 0138 0.24 0.35 e 0.0256 bsc 0.65 bsc c 0.0 039 0.0 079 0.10 0.20 h 0.1260 0.1339 3.20 3.40 d 0.1280 0.1339 3.25 3.40 l 0.0118 0.0197 0.30 0.50 d 1 0.1201 0.1280 3.05 3.25 l 1 0.0039 0.0079 0.10 0.20 d2 0.0945 0.1 024 2.40 2.60 l2 0.0445 ref 1.13 ref notes: 1. controlling dimension: millimeters. 2 . maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing sp ecification or packing method, please contact your local cystek sales office. material: ? ? mold compound: epoxy resin family, flammability solid burning class: ul94v - 0 . important notice: ? all rights are reserved. reproduction i n whole or in part is prohibited without the prior written approval of cyste k . ? cyste k reserves the right to make changes to its products without notice. ? cyste k semiconductor products are not warranted to be suitable for use in life - support applications , or systems. ? cyste k assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. marking: 8 - lead dfn3 3 plastic package cystek package code: v 8 date code s s s g d d d d a7d0 n01
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